1. Field of the Invention
The present invention relates to an inverter circuit for inverting an input signal, in particular, to an inverter circuit which improves fast operability of a load which is connected to the output.
2. Description of the Prior Art
Recently, there has been proposed an inverter circuit which, through use at the output stage of a bipolar transistor and a CMOS transistor, makes it possible to carry out fast operation for a capacitive load as well as to obtain an output level which is the same as that of a CMOS output circuit, without increasing the size of the circuit (see, for example, Japanese Pat. No. 59-205828).
In such a widely used circuit construction, a pair of bipolar transistors serially connected to each other between high and low voltage sources are turned-on or turned-off, but are always opposite in relation to each other, to obtain an inverted output signal at an intermediate connection therebetween. Practically, a turn-on state of the bipolar transistor holds a certain remaining voltage V.sub.BE between its base and emitter, instead of being in a complete conductive condition. To compensate for such remaining voltage bias a subsidiary MOS transistor is employed which is capable of being in a substantially complete conductive condition. Thus it is desired to accomplish an increased switching speed of the MOS transistor to improve inversion speed. Fast operation of the MOS transistor depends on the dimensions of the gate region.
However, increasing the dimensions of the MOS transistor means that the gate capacity of the transistors is increased. This results in the inconvenience that a driving circuit with high current driving capability has to be connected to the input terminal to drive the transistor. Thus, when the driving circuit is to be constructed, for example, by the use of a CMOS transistor, it will give rise to a problem that the driving circuit has to be made large.